Easy · Combinational Logic
Implement a 3-to-8 one-hot decoder with an active-high enable.
A decoder turns a binary number into a one-hot vector: exactly one output bit is 1, and its position is the number. Decoders drive chip selects, register-file write enables and address decoding.
| Port | Dir | Width | Meaning |
|---|---|---|---|
en | input | 1 | Enable, active high. |
sel | input | 3 | Unsigned select value, 0–7. |
y | output | 8 | One-hot output. |
en = 1: bit sel of y is 1 and every other bit is 0. In other wordsy[i] = (i == sel).
en = 0: y is all zeros, whatever sel is.The circuit is purely combinational (no clock, no state).
en | sel | y (binary) |
|---|---|---|
| 0 | any | 0000_0000 |
| 1 | 0 | 0000_0001 |
| 1 | 1 | 0000_0010 |
| 1 | 2 | 0000_0100 |
| 1 | 3 | 0000_1000 |
| 1 | 4 | 0001_0000 |
| 1 | 5 | 0010_0000 |
| 1 | 6 | 0100_0000 |
| 1 | 7 | 1000_0000 |
A shift such as 8'b1 << sel produces the one-hot vector in one line. Mind the width of the constant you shift: in a plain assignment such as y = 1'b1 << sel; the expression is widened to the 8-bit target before shifting, so it happens to work, but in a self-determined context (for example inside a concatenation {...}) 1'b1 << sel is only 1 bit wide and is 0 for any sel > 0. 8'b1 << sel is safe everywhere.
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